When it comes to advanced technology, time to market is a critical factor. Processor manufacturers are under immense pressure to deliver new generations of chips that offer faster processing and greater reliability with higher efficiency, which means that each new generation is more complex and has more (and smaller) components, with four times the number of internal connections.
Throughout a microprocessor design project lifecycle, terabytes of data are produced, which must be efficiently analyzed and acted upon within ever shrinking time-to-market windows. Within this mountain of data, relationships are crucial entities (e.g., Which circuits talk to each other? How does high-level logic design correspond to detailed physical implementation? What are the shortest and longest paths through a given network of electrical components?). The combination of Python analytics with graph databases is uniquely well suited to the analysis tasks at hand.
Kerim Kalafala and Nicholai L’Esperance explain how IBM is using Jupyter notebooks as part of its overall analytics stack to tackle one of the world’s most complex computer design and engineering problems and share their ongoing experiences using Jupyter notebooks to design the next generation of Power and Z processors. In particular, they showcase how Python-based analytics, in conjunction with graph databases, are becoming a critical component to the analysis and design of the world’s fastest microprocessors (the “brains” of every single computer designed by IBM, including those that sit at the heart of the IBM Watson Cognitive Computing platform). The complexity at hand includes analysis of ~10+ billion transistors to an accuracy tolerance of a trillionth of a second (roughly the time taken for light to travel a fraction of a millimeter). Along the way, Kerim and Nicholai explain how they leverage Jupyter notebooks as part of their overall design system.
Kerim Kalafala is a member of the IBM Academy of Technology, a senior technical staff member in the IBM Systems Group, and an IBM Master Inventor. Currently, he is lead architect of static timing and noise analysis software tools used to design and verify the world’s fastest microprocessors. Kerim has received multiple prestigious Research Division awards for publications in computer science and mathematics, an ACM/IEEE Technical Impact Award in Electronic Design Automation, and a best-paper award at the Design Automation Conference and was recognized for coauthoring a top-10 most-cited paper in the 50-year history of DAC. Kerim has also received both the IBM Corporate and Outstanding Technical Achievement Awards for contributions to the field of statistical timing analysis. He is an inventor with 49 issued patents worldwide and approximately a dozen more pending. Kerim is a member of the executive board for the Rhinebeck Science Foundation and volunteers extensively in his local community. Kerim holds undergraduate and graduate degrees in computer and systems engineering from Rensselaer Polytechnic Institute, where he graduated with summa cum laude honors.
Nicholai L’Esperance is a Essex Junction, Vermont-based staff engineer in the Product Engineering Diagnostics Group within the IBM Systems Group, where he develops new tools and methodologies to aid yield, reliability, and characterization missions for IBM’s Power and Z programs. Nicholai holds a BSEE and MSEE from the University of Vermont, where he graduated with cum laude honors. During his time at UVM, Nicholai focused on signal analysis, coauthoring several papers on ground-penetrating radar and device testing. Nicholai is continuing his studies, pursuing a graduate degree in computer science.
©2018, O'Reilly Media, Inc. • (800) 889-8969 or (707) 827-7019 • Monday-Friday 7:30am-5pm PT • All trademarks and registered trademarks appearing on oreilly.com are the property of their respective owners. • firstname.lastname@example.org